DDR4/5 Memory

Specification:

• Compliance with DDR5 DRAM JEDEC rev 0.99
• Compatible with DDR4 JDES79-4D JDEC Standard
• Supports SODIMM, UDIMM, RDIMM, LRDIMM
• Supports Self-Refresh, Pre-charge Power-Down, Active Power-Down operations
• Write levelling support
• Configurable skew
• Supports Random DQs Timing
• Jitter Support
• Command Decoding support
• Randomisation of read delays
• Supports Power-up Reset and initialisation sequences
• Memory densities from 2 to 32 GB with configurable data widths
• Supports Data Bus Inversion and Data Masking
• DDR PHY BFM, Memory Controller Agent, Monitor, Score Board

Deliverables in Verification Environment & Test Suite:

• DDR4/5 Protocol Tests
• Directed & Random Tests
• SV Constrained Random Testing
• Assertions & Cover Point Tests
• Regression and Performance Tests cases
• Built-in Coverage Analysis
• Integration Guide