1G/40G/100G/200G/800G Ethernet Controller

Integrates MAC IP to a broad range of PHY and SerDes IP

Overview

The 800G Ethernet controller IP core implements the physical coding sublayer (PCS) of the Draft Standard for Ethernet, Amendment: Media Access Control Parameters for 800 Gb/s and Physical Layers and Management Parameters for 400 Gb/s and 800 Gb/s Operation and the Ethernet Technology Consortium 800G Specification.

diagram

Features

  • Supports a total bandwidth of 800 Gb/s
  • Supports standalone PCS with RS-FEC
  • Supports lane reordering among the 32 PCS lanes
  • Status signals for all major functional indicators
  • Leverages two hard DCMAC PCS and FEC IP
  • Delivered with a top-level wrapper including functional transceiver wrapper, IP netlist, sample test scripts.
  • Implements an 8-lane interface to connect directly to optical modules using 8 x 106.25 Gb/s SerDes.

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