Compute Express Link 3.0 — the open industry standard for memory-coherent CPU-accelerator connectivity. Enabling disaggregated memory, GPU attachment, and multi-host coherent fabric for AI datacenters.
CXL (Compute Express Link) is the industry-standard protocol for high-bandwidth, cache-coherent CPU-to-device and CPU-to-memory interconnects. Built on the PCIe Gen 5/6 physical layer, CXL enables disaggregated memory architectures, coherent accelerator attachment, and smart memory devices — all critical for modern AI and HPC workloads.
Xtremesilica's CXL 3.0 IP implements all three CXL sub-protocols (CXL.io, CXL.cache, CXL.mem) and all three device types (Type 1 accelerator, Type 2 accelerator with memory, Type 3 memory device), delivered as synthesizable RTL for FPGA and ASIC.